A POWERFUL EXTENSION OF SERVO-LOOP METHOD FOR SIMULATION-BASED A/D CONVERTER TESTING

Ondrej Šubrt, Pravoslav Martinek, Carsten Wegener

Abstract

This paper deals with the virtual testing environment for analog-to-digital converters (ADCs) employing a novel and powerful extension of the Servo-Loop method. We build an improved version of the Servo-Loop targeted to full transistor-level circuit simulation of static integral and differential ADC non-linearity. In comparison with the conventional implementation, the Servo- Loop version proposed was enhanced by an effective search algorithm. The algorithm was implemented as a versatile Servo-Looper tool written in Verilog-A language which is suitable for direct co-operation with most of the analog and mixed-signal simulators used in industry. The prospective advantage of our approach is the fact that the implementation in Verilog-A creates an ideal opportunity to build a complex environment comprising the virtual testing engine as well as the DUT in the form of circuit-level ADC design or its behavioral model. At this point, the powerful capabilities of the proposed Servo-Looper tool were successfully confirmed by a large simulation set performed on the ADC behavioral model and the full custom ADC design example. The paper presents the most significant results of the ADC simulation procedure.

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IMEKO TC

TC4 - Measurement of Electrical Quantities

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