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A SIMPLIFIED 3 –BITS DISCRETE PURE LINEAR ANALOG PREPROCESSING FOLDING ADC ARCHITECTURE

Fabio Leccese

Abstract

A simplified architecture of subranging pure linear folding ADC is proposed. The device is based on the folding idea to eliminate the DAC, the summing node and the amplifier, fundamental elements of the classical architecture, replacing them by means of an analogical signal preprocessing parallel structure named “channels”. The presented circuit in addition to the advantage of a reduction of total conversion time than a classical subranging ADC, so approaching ADC flashes, is very simple and easy to build. An accurate simulation of the single channels and of the whole structure validate the idea. A first discrete circuit it has been realized and tested.

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IMEKO-IWADC-2008-050.pdf
DOI
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IMEKO TC
TC4 - Measurement of Electrical Quantities

Event details

Event
IWADC 2008
Technical Committee
TC4
Place
Florence, ITALY
Time
22 September 2008 - 24 September 2008
Website
http://www.imeko2008.org/

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