A MAXIMUM LIKELIHOOD ESTIMATOR FOR ADC AND DAC LINEARITY TESTING
Abstract
The paper illustrates a method for simultaneous ADC and DAC linearity testing in a loop-back scheme. The main features of the method are: (i) it is statistically nearly optimal, being based on a maximum likelihood estimator; (ii) it does not require prior knowledge neither of the ADC nonlinearity, nor of the DAC nonlinearity – both are simultaneously measured relying only on a constant-variance noise. The performances of the method are studied both mathematically and via computer simulations. The method, because of its optimality and universality, appears to be also a good candidate for inclusion in technical standards relevant to ADC and DAC testing.
Event details
- Event
- IWADC 2008
- Technical Committee
- TC4
- Place
- Florence, ITALY
- Time
- 22 September 2008 - 24 September 2008
- Website
- http://www.imeko2008.org/