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A MAXIMUM LIKELIHOOD ESTIMATOR FOR ADC AND DAC LINEARITY TESTING

Giuseppe Cavone, Attilio Di Nisio, Nicola Giaquinto and Mario Savino

Abstract

The paper illustrates a method for simultaneous ADC and DAC linearity testing in a loop-back scheme. The main features of the method are: (i) it is statistically nearly optimal, being based on a maximum likelihood estimator; (ii) it does not require prior knowledge neither of the ADC nonlinearity, nor of the DAC nonlinearity – both are simultaneously measured relying only on a constant-variance noise. The performances of the method are studied both mathematically and via computer simulations. The method, because of its optimality and universality, appears to be also a good candidate for inclusion in technical standards relevant to ADC and DAC testing.

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IMEKO-IWADC-2008-140.pdf
DOI
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IMEKO TC
TC4 - Measurement of Electrical Quantities

Event details

Event
IWADC 2008
Technical Committee
TC4
Place
Florence, ITALY
Time
22 September 2008 - 24 September 2008
Website
http://www.imeko2008.org/

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