ANALYSIS OF A MULTIPLYING DAC EMPLOYED FOR SYNCHRONOUS DETECTION
Abstract
Multiplying digital to analog converters can be used as synchronous detection circuits by combining a proper code sequence and an analog input at the reference. The output for a periodic signal has been derived under reasonable assumptions. The analysis shows that this type of synchronous detector is sensible only to harmonic components almost equal to a multiple of the number of samples per period. This result can be seen as a generalization of the classical two-level synchronous detection theory.
Event details
- Event
- IWADC 2004
- Technical Committee
- TC4
- imeko@mail.ntua.gr
- Place
- Athens, GREECE
- Download
- imeko_tc4_2004_call_for_papers2.pdf
- Time
- 29 September 2004 - 1 October 2004
- Website
- http://www.medialab.ntua.gr/IMEKO