A 6-b 1Gsample/s SiGe BiCMOS A/D Converter
Abstract
The paper describes the design of a 1GS/s 6-bit ADC in SiGe BiCMOS technology. Several techniques such as subranging, interpolation and averaging were implemented on the original flash architecture in order to achieve low power consumption without sacrificing linearity and dynamic performance.
Event details
- Event
- TC4 Conference and Workshop 2002
- Technical Committee
- TC4
- Place
- Prague, CZECH REPUBLIC
- Time
- 26 June 2002 - 28 June 2002