HARDWARE IMPLEMENTATION OF AN ADC ERROR COMPENSATION USING NEURAL NETWORKS

Hervé Chanal

Abstract

A compensation technique for Analog-to-Digital Converter (ADC) based on a neural network is proposed. The implementation is done both in software and in a hardware description language. The latter is targeted for a massively parallel ASIC. The training of the neural network is done by learning a Look Up Table generated by processing the output of the ADC for sine waves inputs. Then, the effective number of bits (ENOB) is computed over a large range of frequencies for the raw data of a 100MS/s ADC and for the compensated data. These results are used to compare various neural network architecture and the effects of the approximations made for the hardware implementation.

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DOI

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IMEKO TC

TC4 - Measurement of Electrical Quantities

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