TIME-TO-DIGITAL CONVERTER WITH DIRECT SUCCESSIVE CHARGE REDISTRIBUTION
Abstract
In the paper, the enhanced version of time-to-digital converter with self-timed successive charge redistribution is presented. In the proposed solution, time-to-charge mapping realized by constant rate charge accumulation is run concurrently to the charge redistribution in the binary-weighted capacitor array. By introducing concurrent charge accumulation and redistribution, the conversion is characterized by reduced conversion time and conversion time jitter, reduction of die area of the chip, and of the number of state transitions per a single conversion cycle.
Event details
- Event
- IWADC 2011
- Technical Committee
- TC4
- Place
- Orvieto, ITALY
- Time
- 30 June 2011 - 1 July 2011
- Website
- http://www.iwadc2011.diei.unipg.it/Sito/IWADC2011.html