Simulation, Measurement and Test Environment for Pseudo Random Number Generator Circuits
Abstract
The paper presents an environment and methodology for analysis of Pseudo random bit sequence generator (PRBSG) and Pseudo random number generator (PRNG) circuits through simulation and measurement. Circuits’ projects are described in VHDL and then simulated on FPGA devices. The programmed FPGAs are stimulated by vector signal generator and then measured with a logic analyzer. The bit sequences generated by the PRBSG circuits are tested for randomness with tests from the NIST test suit. The random numbers generated by the PRNG circuits are tested through histograms and chi-square tests for uniform distribution.
Event details
- Event
- TC4 Symposium 2014
- Technical Committee
- TC4
- Place
- Benevento, ITALY
- Time
- 15 September 2014 - 17 September 2014
- Website
- http://www.imeko-tc4-2014.org