AN EMBEDDED BOUNDARY SCAN TEST SYSTEM

Nuno Cardoso, Carlos Beltrán Almeida

Abstract

This paper describes an application of boundary scan IEEE Std. 1149.1 at system level. It provides the description of the design and the implementation options of a VME boundary scan controller board prototype and the corresponding software. The prototype was designed to use the Module Test and Maintenance (MTM) bus, existing in the VME 64x backplane, to apply the IEEE 1149.1 test vectors to a single board with a specific test infrastructure also described in this contribution. The software takes the boundary scan test/programming vectors generated by an automatic test pattern generator (ATPG) in serial vector format (SVF), and converts them into a format suitable to be used in the considered test infrastructure.

Keywords

boundary scan test, system level test, VME instrumentation

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IMEKO-TC4-2001-130.pdf

DOI

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IMEKO TC

TC4 - Measurement of Electrical Quantities

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