DESIGN SIMULATION OF DECIMATION FILTER FOR SIGMA DELTA CONVERTERS

S. Boujelben, Ch. Rebai, D. Dallet, Ph. Marchegay

Abstract

The purpose of this paper is to present several filter topologies used for decimation of sigma delta modulated digital signals in order to choose the optimized filter architecture with regards to an efficient implementation. The filter is suited for data conversion and measurement applications. A second order 1-bit sigma delta modulator will be considered as the front-end A/D converter. The subsequent digital filter reduces the sampling rate by a factor of 64 and must guarantee a stop band attenuation of 80 dB.

Keywords

Sigma Delta Converter, decimation

Download

IMEKO-TC4-2001-135.pdf

DOI

-

IMEKO TC

TC4 - Measurement of Electrical Quantities

Back to the proceedings