DESIGN CONSIDERATIONS FOR SDMs BEYOND ADSL
Abstract
This paper presents design considerations for ΣΔMs aimed at high-linearity, high-speed A/D conversion. We analyze the performance of a family of high-order cas- cade multi-bit architectures in a low-voltage, deep-sub- micron scenario. We show that, after proper architecture selection, guided by a simple power estimation method, these ΣΔMs are promising candidates to achieve post-ADSL performances in future CMOS processes.
Event details
- Event
- iwadc-2003