A CS method for DAC nonlinearity testing
Abstract
High resolution Digital-to-Analog Converters (DACs) are known to be characterized by static testing procedures with a remarkable duration, due to the huge number of employed codes. This paper proposes a method that allows to reconstruct the Integral Non-Linearity through the Compressed Sensing, by measuring the DAC output on a reduced number of codes. The proposed reduced-code test is evaluated for several compression ratios, turning out well performing in terms of Root Mean Square Error.
Event details
- Event
- tc4-2020