Aperture Jitter and Timing Skew Analyses in ADC Structure

Maher Jridi, Rafael Shirakawa, Dominique Dallet

Abstract

Time interleaved ADCs are generally very sensitive to any sampling time errors. In order to study its influence in term of performance decreasing, there is introduced an ADC jitter model developed in Simulink. Simulation results of this model correspond with the formulas described in literature[1] and [2]. Timing skew errors of the time interleaved structure are discussed and compared to those of a single ADC.

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IMEKO-TC4-2005-103.pdf

DOI

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IMEKO TC

TC4 - Measurement of Electrical Quantities

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