SIMULATION OF THE ”SINGLE VIA THERMAL CYCLE TEST” FINITE ELEMENT MODELLING OF PCBS UNDER THERMAL LOADS

K. Fellner, P. F. Fuchs, G. Pinter

Abstract

The “Single Via Thermal Cycle Test” (SVTCT) is a thermal cycle test used for life time assessment of Printed Circuit Boards (PCBs) under cyclic thermal loads. During the SVTCT, the electrical conductivities of the interconnections (vias) of the tested PCB are monitored by resistance measurements. Hence, by a decrease of electrical conductivity, failure can be detected. A single via in a PCB is modeled using an axisymmetric simulation model. The simulations are conducted decoupled. One model for computing the temperature field in the PCB and another model to compute the stress and strain distribution are generated. The calculated stress and strain distributions are opposed to microsections of vias in PCBs, which have been subjected to the SVTCT. All cracks occurred at locations, which are highly stressed according to the simulations. This research work is part of the Master’s Thesis “Simulation of the ‘Single Via Thermal Cycle Test’ - modelling and determination of the material input parameters”.

Keywords

printed circuit board, interlayer connection, copper, prepreg, thermal expansion, finite element simulation, decoupled simulation

Download

IMEKO-YSESM-2014-006.pdf

DOI

-

IMEKO TC

TC15 - Experimental Mechanics

Back to the proceedings