Automatic Generation of LH-BIST Architecture for ADC Testing

S. Bernard, F. Azaïs, M. Comte, Y. Bertrand, M. Renovell

Abstract

No generic BIST architecture exists for Analog-to-Digital Converters testing. For each application and test setup we thus have to build a dedicated BIST architecture. In this paper, we show that the LH-BIST architectures based on the Linear Histogram-based test technique are configurable and we evaluate hardware resources according to any given application. We also propose a software tool allowing the automatic generation of the LH-BIST description.

Keywords

ADC testing, Histogram-based test, BIST, configurable BIST architecture

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DOI

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IMEKO TC

TC4 - Measurement of Electrical Quantities

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