TIME-TO-DIGITAL CONVERTER WITH DIRECT SUCCESSIVE CHARGE REDISTRIBUTION |
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| Dariusz Kościelnik, Marek Miśkowicz |
- Abstract:
- In the paper, the enhanced version of time-to-digital converter with self-timed successive charge redistribution is presented. In the proposed solution, time-to-charge mapping realized by constant rate charge accumulation is run concurrently to the charge redistribution in the binary-weighted capacitor array. By introducing concurrent charge accumulation and redistribution, the conversion is characterized by reduced conversion time and conversion time jitter, reduction of die area of the chip, and of the number of state transitions per a single conversion cycle.
- Download:
- IMEKO-IWADC-2011-42.pdf
- DOI:
- -
- Event details
- IMEKO TC:
- TC4
- Event name:
- IWADC 2011
- Title:
16th IMEKO International Workshop on ADC Modeling and Testing - Data Converter Design, Modeling and Testing (together with IEEE ADC Forum) (IWADC)
- Place:
- Orvieto, ITALY
- Time:
- 30 June 2011 - 01 July 2011