Time and Frequency Domain Tests for ΣΔ Modulators |
|---|
| Domenico Luca Carnì, Domenico Grimaldi, Leonardo Serratore |
- Abstract:
- The paper deals with the classification method of some architectures of ΣΔ modulators. The classification is based on the analysis of the different trends of the output signals characterizing some ΣΔ modulator architectures. The method operates (i) by feeding the ΣΔ modulator with sinusoidal signal, and (ii) by analysing the output signals in the time or in the frequency domain. The classification consists in (i) distinguishing between low pass and band pass ΣΔ modulator, (ii) identifying both the Single Quantizer Loop (SQL) and the Multistage Noise Shapers (MASH) architecture, (iii) evaluating the levels of the quantizer block inside the SQL architecture, and (iv) detecting the number of cascaded stage inside the MASH architecture. In order to validate the proposed method, numerical tests are performed by referring to the noumerous architectures of ΣΔ modulators proposed in the relevant literature.
- Download:
- IMEKO-TC4-2005-112.pdf
- DOI:
- -
- Event details
- IMEKO TC:
- TC4
- Event name:
- TC4 Workshop 2005
- Title:
10th IMEKO TC4 International Workshop on ADC Modelling and Testing - IWADC (together with XIVth IMEKO TC4 International Symposium on New Technologies in Measurement and Instrumentation)
- Place:
- Gdynia/Jurata, POLAND
- Time:
- 12 September 2005 - 15 September 2005