Failure Analysis Based on Emulation Systems

Leopoldo Angrisani, Felice Cennamo, Giacomo Ianniello, Aniello Stellato
Abstract:
To increase the throughput of electronic manufacturing companies, design, prototyping, production, installation and maintenance processes of electronic devices are generally complemented by a number of performance and parametric tests, known as Failure Analysis (FA). In this paper, major FA proposals are considered. In particular, two noninvasive solutions are presented in detail: an advanced boundary scan, using an FPGA to speed up the tests, and a logic combinational test procedure, performed by means of a fault injectable emulation system. Moreover, an innovative CPU emulation approach is proposed, particularly suited to devices that include CPU chips. In order to detect hardware faulty, the approach provides for the emulation of the same boot code designed for DUT normal operation.
Keywords:
Failure analysis, Electronic boards testing, Failure diagnostics, Emulation systems for testing, Testing and troubleshooting
Download:
IMEKO-TC4-2014-339.pdf
DOI:
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Event details
IMEKO TC:
TC4
Event name:
TC4 Symposium 2014
Title:

20th IMEKO TC4 Symposium on Measurements of Electrical Quantities (together with 18th TC4 International Workshop on ADC and DCA Modeling and Testing, IWADC)
"Research on Electrical and Electronic Measurement for the Economic Upturn"

Place:
Benevento, ITALY
Time:
15 September 2014 - 17 September 2014