AN EMBEDDED BOUNDARY SCAN TEST SYSTEM |
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| Nuno Cardoso, Carlos Beltrán Almeida |
- Abstract:
- This paper describes an application of boundary scan IEEE Std. 1149.1 at system level. It provides the description of the design and the implementation options of a VME boundary scan controller board prototype and the corresponding software. The prototype was designed to use the Module Test and Maintenance (MTM) bus, existing in the VME 64x backplane, to apply the IEEE 1149.1 test vectors to a single board with a specific test infrastructure also described in this contribution. The software takes the boundary scan test/programming vectors generated by an automatic test pattern generator (ATPG) in serial vector format (SVF), and converts them into a format suitable to be used in the considered test infrastructure.
- Keywords:
- boundary scan test, system level test, VME instrumentation
- Download:
- IMEKO-TC4-2001-130.pdf
- DOI:
- -
- Event details
- IMEKO TC:
- TC4
- Event name:
- TC4 Symposium 2001
- Title:
11th IMEKO TC4 Symposium on Trends in Electrical Measurements and Instrumentation (together with 6th IMEKO TC4 Workshop on ADC Modelling and Testing)
- Place:
- Lisbon, PORTUGAL
- Time:
- 13 September 2001 - 14 September 2001