Effect Of Short Pulsed Program/Erase Cycling On Flash Memory Devices |
|---|
| Philippe Chiquet, Jérémy Postel-Pellerin, Clia Tuninetti, Sarra Souiki-Figuigui, Pascal Masson |
- Abstract:
- The present paper proposes to investigate the effect of pulsed Program/Erase cycling on Flash memory devices. Usually, electrical operations related to said devices involve the application of single long pulses to various terminals of the memory transistor to induce various tunneling effects allowing the variation of the floating gate charge. According to the literature, the oxide degradation occuring in such cases can be reduced by replacing DC stress by AC stress of the MOS-based devices. After a brief presentation of the functioning of the Flash memory transistors tested in this work, the experimental setup used to replace standard electric signals with short pulses will be described. Electrical results showing the benefits of programming and erasing non-volatile memories with short pulses will then be presented.
- Download:
- IMEKO-TC10-2016-003.pdf
- DOI:
- -
- Event details
- IMEKO TC:
- TC10
- Event name:
- TC10 Workshop on Technical Diagnostics 2016
- Title:
14th IMEKO TC10 Workshop “New Perspectives in Measurements, Tools and Techniques for system’s reliability, maintainability and safety”
- Place:
- Milano, ITALY
- Time:
- 27 June 2016 - 28 June 2016