A Folding ADC Based on Switched Capacitor Circuits in 350 nm CMOS |
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| Wendell. E. M. Costa, Sabiniano A. Rodrigues, Raimundo C. S. Freire, Sebastian Y. Catunda, Thaís L. V. N. Silva, Malone Soares de de Castro, Fernando Rangel de Sousa |
- Abstract:
- This paper presents a 10-bit folding analog-digital converter (ADC) using switched capacitors (SC) circuits. In this architecture, the conversion is achieved when the signal crosses a certain voltage level and at this time, a voltage value is added or subtracted from the analog input signal. The proposed ADC consists in eight identical stages, to perform the conversion of one bit at a time. Each stage is built with a amplifier circuit using switched capacitor with gain 2. The ADC is designed in a standard 350 nm CMOS (Complementary Metal- Oxide-Semiconductor) technology. A conversion time of 570 ns and a SNDR of 56.8 dB were obtained by simulations with the ADC prototype, to a 10 bits resolution converter with 3.3 V power supply and a 8 mW power consumption.
- Keywords:
- Switched Capacitor Circuits, A/D Converter, Folding ADC
- Download:
- IMEKO-TC4-2013-115.pdf
- DOI:
- -
- Event details
- IMEKO TC:
- TC4
- Event name:
- TC4 Symposium 2013
- Title:
- 19th IMEKO TC4 Symposium Measurements of Electrical Quantities (together with 17th TC4 IWADC Workshop on ADC and DAC Modelling and Testing)
- Place:
- Barcelona, SPAIN
- Time:
- 18 July 2013 - 19 July 2013