FPGA-synthesizable Filter Model Based Bitstream DAC for Hardware-in-the-Loop Simulators |
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| Tamás Kökényesi, Norbert Durbák, István Varjasi |
- Abstract:
- The advances in FPGA technology have enabled fast real-time simulation of power converters, filters and loads. HIL (Hardware-in-the-Loop) simulators taking advantage of this technology have revolutionized control software and hardware development for power electronics. HIL simulators can reproduce the same analogue signals that would be measurable on real power converter circuits. A very common limitation in these applications is the usable pin count of the FPGA, because many analogue signals are needed and there are other functions as well. Switching frequencies in today's power converters are getting higher and higher, so the emulated current signals' frequencies are also increasing. Σ-&Delta DACs provide an efficient, FPGA-synthesizable solution using a single pin for each output, but the output signal’s bandwidth and latency is usually not sufficient, because of the used analogue filters. The subject of this paper is to introduce a new bitstream DAC architecture, which is capable of reproducing higher frequency current signals (usually triangle waves) more accurately than traditional Σ-&Delta solutions.
- Keywords:
- Σ-&Delta DAC, HIL simulation, FPGA
- Download:
- IMEKO-TC4-2016-38.pdf
- DOI:
- -
- Event details
- IMEKO TC:
- TC4
- Event name:
- TC4 Symposium 2016
- Title:
21st IMEKO TC4 Symposium on Measurements of Electrical Quantities (together with 19th TC4 International Workshop on ADC and DCA Modeling and Testing, IWADC)
"Understanding the World through Electrical and Electronic Measurement"- Place:
- Budapest, HUNGARY
- Time:
- 07 September 2016 - 09 September 2016