In this paper a new method of proving stability of Delta-Sigma modulators in the way of bounding outputs of integrators has been described. The presented approach is theoretical as well as computational. The method has been tested exhaustively for second-order multiple-feedback modulators.
The conversion rate of purely electronic analog-to-digital converters is limited in speed to conversion rates of some Gsps. A way to obtain substantially higher conversion rates is the use of photonic circuits as input stage of an analog-to-digital converter. A comparison of different approaches for optical analog-to-digital conversion is given with special emphasis on the properties of the key optoelectronic components employed in the different concepts. In particular we report the state of the art of the development of optoelectronic modulators, Self-Electrooptic-Effect-Devices and...
This paper presents an overview of state of the art applications of Digital to Analog and Analog to Digital converters when embedded into a Digital Communication System (DCS). Three DCSs are considered: the Terrestrial Digital Video Broadcasting (DVB), the Digital Audio Broadcasting (DAB), and the Global System for Mobiles (GSM). For each system the role of converters is identified, along with the minimal performance requirements. The advantages of Sigma-Delta converters upon traditional converters are then outlined and the usage of Sigma-Delta converters is discussed as a mean to improve...
The increasing complexity o f data converter architectures m akes it necessary to use behavioral m odels to simulate the electrical performances and to determine the relevant data converter features. For this purpose, special input stimulus and specific output data processing are required. Thus, we need a specific data-converter simulation environment. A iming at this objective, this paper analyses the m ost utilized a rchitectures and identifies the basic (active and passive) building blocks used. Behavioral m odels o f such basic blocks are discussed. The proposed behavioral m odels are...
The new IEEE Std 1241, “Standard Terminology and Test Methods for Analog-to-Digital Conversions” (1241) is about to be released by IEEE for general use. It builds on IEEE Std 1057-1994, “Standard for Digitizing Waveform Recorders” (1057). 1057 has been used to date throughout the world for ADC testing in lieu of a general ADC standard. This paper discusses similarities between 1057 and 1241 and emphasizes important differences.
For dynamic quality tests of the AD converters a high quality test signal is required. When testing a high speed AD converters, the conventional test signals have reached their dynamic and resolution limits. In this paper an overview of using the step-wise approximated multi-cycle sine wave as a test signal for dynamic quality tests of high speed, high quality AD converters is presented. The proposed test signal is characterised by high stability time and amplitude parameters. The slight difference in the heights of steps of the sequential single cycles ensures stimulation of all codes of...
ADC data sheets and test methods are not yet standardized. A new attempt to create a common platform for these is the draft standard IEEE-STD-1241. However, the methods described in this standard need an extra effort from the user to exactly understand and implement them. It is therefore very reasonable to provide programs which implement these methods, and allow manufacturers and users to use them. This assures that the same characterizing quantities will be used for the same purpose by everyone. The first attempt for this was a LabView program announced in 1999. In this paper another...
Discretisation error is responsible for one of major metrological problems concerning digital instruments such as AD converters. Designing the device of stable relative error would provide the ideal solution. The aim of this work is to introduce the problem and propose the float point AD converter with variable gain amplifier (VGA) as a solution. The proposed fast setting gain with flash AD converter as a coarse one is the new approach. The conversion consists of two stages coarse and fine one. The VGA works as pre-processing circuit for fine conversion. The VGA gives the stable signal value...
This paper reports the main dynamic tests results about two (2)main ultrahigh speed Sample and Hold (S/H). For the different testing analyses, the laboratory used the well-known 14bits Analog to Digital Converter (ADC) ADC614KH (14bits/5.12MHz) .This ADC is manufactured par the US BURR-BROWN company . The two evaluated S/H are available on the commercial market . These are the S/H AD9100JD (US ANALOG DEVICES company) and the SHM12S (US DATEL company).
Reducing interval arithmetic enables to describe properties of error sources in the matrix form. It is especially significant when algorithms process long measuring result sequences. Changes in time of measured quantity cause dynamic errors in the analog elements of measuring chain. When signal is nonsinusoidal the dynamic error can be presented as a set of harmonics. Those harmonics should be composed in order to get the resultant error. The method described in the paper enables to represent a set of harmonics as a set of intervals. The interdependence of those intervals is determined by...