Shang Wei Lu, Li Tao, Cheng Yong Pei, Wang Yan, Qian Zhao Jun
50 kNm TORQUE STANDARD MACHINE

The paper introduces the working principle of dead-weight balance type 50kNm torque standard machine , which was developed recently. The paper describes in detail the key technique , etc. such as the knife edge supporting technique with high load , the force magnifing technique , the alignment technique and the computer control automatic loading technique , etc. The paper analyses the uncertainty of the machine and the compared and verifyed data with LNE . The uncertainty of the 50kNm torque standard machine arrives at 0.023%(tp=3.1).

Maria Gabriella Masi, Lorenzo Peretto, Roberto Tinarelli, Luigi Rovati
A  PUPIL SIZE MEASUREMENT SYSTEM FOR THE ANALYSIS OF THE IMPACT OF FLICKER ON HUMAN BEING

The validation of any new model of the human response to flicker requires proper experimental data. Recently, studies have been carried out with the intent of achieving information relevant to the state of annoyance of a human being subjected to light flicker by analyzing the modification of the pupil size. Indeed, it is well known that pupil diameter changes according to the luminous flux variation. According to such a theory the authors developed a measurement system capable of tracing the pupil size variations in time under flicker conditions. This will result of help for further developing the above theory and confirming its correctness and robustness. The presented measurement system will allow measuring the pupil diameter when subjected to flicker with given amplitude, frequency and colour. The technique and the relative system will be examined through the description of some tests executed to evaluate its performance. The good behaviour of the measurement system suggests its future employment for the analysis of flicker effects on human beings.

Mustafa Keskin, Un-Ku Moon, Gabor C. Temes
A 0.9-V 10.7-MHz 3.6-mW Bandpass ∆Σ Modulator Using Unity-Gain-Reset Opamps

A low-voltage and low-power bandpass ∆Σ modulator is described. In this design, two novel ideas are incorporated: unity-gain-reset and integrating-two-path techniques. A test chip, realized in a 0.35- µ m CMOS process and clocked at both 20 and 40 MHz, provided a dynamic range DR = 45 dB and a signal-to-noise+distortion-ratio SNDR = 36 dB for a 100-kHz signal bandwidth at 5MHz center frequency, and DR = 30 dB and SNDR = 32 dB for a 200-kHz BW at 10MHz center frequency. The supply voltage was 0.8 V for 20 MHz clock, and 0.9 V for 40 MHz clock.

S. Marabelli, A. Fornasari, P. Malcovati, F. Maloberti
A 14-BIT BANDPASS MASH SIGMA-DELTA PIPELINE A/D CONVERTER

In this paper a two stage bandpass MASH (multi-stage noise shaping) sigma-delta (Σ∆) modulator is presented. A resolution of 14 bits has been achieved over a 5 MHz band around an intermediate frequency (IF) of 20 MHz with a clock frequency of 80 MHz. This performance is obtained using a 6-th order bandpass Σ∆ modulator followed by a 10 bit pipeline converter. The proposed circuit has been extensively simulated, both at behavioral and at circuit level, and results are illustrated.

Fabio Leccese, Michael Magnone
A 3 BITS DISCRETE PURE LINEAR ANALOG PREPROCESSING FOLDING ADC ARCHITECTURE BASED ON CASCADE CONTROLLED CHANNELS

A very simple circuit for a 3-bits discrete pure linear analog preprocessing folding ADC is presented. The device is based on the folding idea: the DAC, the summing node and the amplifier, fundamental elements of the classical architecture, are eliminated and replaced with an analogical signal preprocessing parallel structure named "channels". All channels are connected as a cascade and only three transistors constitute each one. The circuit has been widely analyzed by simulation and its simplicity guarantees easiness of realization, reduction of power consumption and reduction of total conversion time, making it close to the ADC flash. A first discrete circuit it has been realized and tested.