## IMEKO Event Proceedings

Page 6 of 855 Results 51 - 60 of 8544

**4”, 0.63 Beta Ratio Cone DP Meter Wet Gas Performance**

Cone DP meters are often used for unprocessed natural gas flow metering applications. Unprocessed natural gas flows can have entrained water and light hydrocarbon liquids. Hence, it is important to fully understand the wet gas flow response of cone DP meters. One method of metering the gas flow rate of a wet natural gas flow is to estimate the liquid flow rate (usually a mixture of hydrocarbon liquid and water) from an independent source (such as a tracer dilution technique or test separator histories) and then use a wet gas correction factor or "correlation" to correct for the liquid induced gas flow rate error. It is therefore necessary to have a reliable cone DP meter wet gas correlation for wet natural gas flows where the liquid component is a water and / or a light hydrocarbon liquid mixture.

**50 kNm TORQUE STANDARD MACHINE**

The paper introduces the working principle of dead-weight balance type 50kNm torque standard machine , which was developed recently. The paper describes in detail the key technique , etc. such as the knife edge supporting technique with high load , the force magnifing technique , the alignment technique and the computer control automatic loading technique , etc. The paper analyses the uncertainty of the machine and the compared and verifyed data with LNE . The uncertainty of the 50kNm torque standard machine arrives at 0.023%(tp=3.1).

**50-OHM MULTIJUNCTION THERMAL CONVERTERS FOR AC VOLTAGE MEASUREMENTS UP TO 100 MHz**

Multijunction thermal converters (MJTCs) are in use as standards for ac voltage measurements at frequencies up to 100 MHz. At the National Institute of Standards and Technology (NIST), MJTCs based on glassy substrates with 50 Ω input impedances are being developed to align more closely with common practice at high frequencies. Preliminary results indicate that 50 Ω MJTCs with excellent properties can be successfully fabricated.

**A PUPIL SIZE MEASUREMENT SYSTEM FOR THE ANALYSIS OF THE IMPACT OF FLICKER ON HUMAN BEING**

The validation of any new model of the human response to flicker requires proper experimental data. Recently, studies have been carried out with the intent of achieving information relevant to the state of annoyance of a human being subjected to light flicker by analyzing the modification of the pupil size. Indeed, it is well known that pupil diameter changes according to the luminous flux variation. According to such a theory the authors developed a measurement system capable of tracing the pupil size variations in time under flicker conditions. This will result of help for further developing the above theory and confirming its correctness and robustness. The presented measurement system will allow measuring the pupil diameter when subjected to flicker with given amplitude, frequency and colour. The technique and the relative system will be examined through the description of some tests executed to evaluate its performance. The good behaviour of the measurement system suggests its future employment for the analysis of flicker effects on human beings.

**A “BLIND” CORRECTION OF DYNAMIC ERROR OF A NONSTATIONARY FIRST ORDER TRANSDUCER FOR THE PERIODIC CASE – SIMULATION INVESTIGATION**

The paper presents an extension of the “blind correction” method with respect to nonstationary transducers of the first order. An analytical description of the measuring channels’ dynamics is presented for the case where both: the measured signal and the measuring channels’ parameters are varying with same fundamental frequency. The influence of the measuring system parameters on the correction accuracy was investigated using the simulation methods.

**A 0.9-V 10.7-MHz 3.6-mW Bandpass ∆Σ Modulator Using Unity-Gain-Reset Opamps**

A low-voltage and low-power bandpass ∆Σ modulator is described. In this design, two novel ideas are incorporated: unity-gain-reset and integrating-two-path techniques. A test chip, realized in a 0.35- µ m CMOS process and clocked at both 20 and 40 MHz, provided a dynamic range DR = 45 dB and a signal-to-noise+distortion-ratio SNDR = 36 dB for a 100-kHz signal bandwidth at 5MHz center frequency, and DR = 30 dB and SNDR = 32 dB for a 200-kHz BW at 10MHz center frequency. The supply voltage was 0.8 V for 20 MHz clock, and 0.9 V for 40 MHz clock.

**A 1-V 416-nW FULLY INTEGRATED SENSOR INTERFACE IC FOR PACEMAKERS**

An ultra-low-power, low-noise sensor interface IC for pacemakers is presented. The proposed architecture is designed to achieve small chip area and a good trade-off between power consumption and noise figure by using current-mode operation. The IECG signal, from 50 mHz-100 Hz, is first filtered by a bandpass filter. Subsequently, the signal output of the filter is converted into a current by a nonlinear transconductance (Gm) cell. The output of the Gm-cell is digitized by a nonlinear 8-bit 1 kS/s Current-mode Successive Approximation ADC to compensate for the nonlinearity of the Gm-cell. The simulated input-referred noise is 5.48 µVrms, achieving a Noise Efficiency Factor of 3.3, and the simulated power consumption for the overall system is 416 nW while operating from a 1 V supply.

**A 14-BIT BANDPASS MASH SIGMA-DELTA PIPELINE A/D CONVERTER**

In this paper a two stage bandpass MASH (multi-stage noise shaping) sigma-delta (Σ∆) modulator is presented. A resolution of 14 bits has been achieved over a 5 MHz band around an intermediate frequency (IF) of 20 MHz with a clock frequency of 80 MHz. This performance is obtained using a 6-th order bandpass Σ∆ modulator followed by a 10 bit pipeline converter. The proposed circuit has been extensively simulated, both at behavioral and at circuit level, and results are illustrated.

**A 2-DOF MODEL FOR BACK-TO-BACK SHOCK TRANSDUCER**

By applying a two-degree-of-freedom system model (2-DOF) for an Endevco type 2270 back-to-back reference accelerometer, systematic deviations between measured and fitted 1-DOF transfer functions could be improved. Some key information for the identification of the model parameters is found in the frequency range beyond the first resonance, a range which was rarely considered in the past.

**A 3 BITS DISCRETE PURE LINEAR ANALOG PREPROCESSING FOLDING ADC ARCHITECTURE BASED ON CASCADE CONTROLLED CHANNELS**

A very simple circuit for a 3-bits discrete pure linear analog preprocessing folding ADC is presented. The device is based on the folding idea: the DAC, the summing node and the amplifier, fundamental elements of the classical architecture, are eliminated and replaced with an analogical signal preprocessing parallel structure named "channels". All channels are connected as a cascade and only three transistors constitute each one. The circuit has been widely analyzed by simulation and its simplicity guarantees easiness of realization, reduction of power consumption and reduction of total conversion time, making it close to the ADC flash. A first discrete circuit it has been realized and tested.

Page 6 of 855 Results 51 - 60 of 8544