IMEKO Event Proceedings Search

Page 832 of 936 Results 8311 - 8320 of 9356

Ondrej Šubrt, Pravoslav Martinek, Carsten Wegener
A POWERFUL EXTENSION OF SERVO-LOOP METHOD FOR SIMULATION-BASED A/D CONVERTER TESTING

This paper deals with the virtual testing environment for analog-to-digital converters (ADCs) employing a novel and powerful extension of the Servo-Loop method. We build an improved version of the Servo-Loop targeted to full transistor-level circuit simulation of static integral and differential ADC non-linearity. In comparison with the conventional implementation, the Servo- Loop version proposed was enhanced by an effective search algorithm. The algorithm was implemented as a versatile Servo-Looper tool written in Verilog-A language which is suitable for direct co-operation with most of the analog and mixed-signal simulators used in industry. The prospective advantage of our approach is the fact that the implementation in Verilog-A creates an ideal opportunity to build a complex environment comprising the virtual testing engine as well as the DUT in the form of circuit-level ADC design or its behavioral model. At this point, the powerful capabilities of the proposed Servo-Looper tool were successfully confirmed by a large simulation set performed on the ADC behavioral model and the full custom ADC design example. The paper presents the most significant results of the ADC simulation procedure.

Linus Michaeli, Michal Sakmár, Ján Šaliga
SOME ERRORS OF ANALOGUE SIGNAL SOURCES FOR ADC EXPONENTIAL STIMULUS HISTOGRAM TEST

This paper presents some typical errors of exponential stimulus generated by analog signal sources and their influence on errors of ADC testing by the histogram method. The analysed exponential signals are very close to linear signals such as triangular and sawtooth signals that can be very simply generated by active integrating circuit or passive integrating circuit with long time constant and/or the final voltage far beyond the ADC input range. The experimental measurements of some analogue generators on the market as well as passive and active generating circuit specially designed for the testing were performed. The sources of signal shape errors were investigated and capacitor was determined as the most critical component of generating circuit. The limitations of signal shape error were evaluated and related to the INL test error.

Josef Vedral, Jan Neškudla
PSEUDORANDOM NOISE GENERATOR FOR ADC TESTING

This paper demonstrates two methods of noise signal generation for ADC testing. Digital pseudo-random number generator based on LFSR and combinations of LFRS are used. The objective of this exploration is to develop device for generation noise signal with uniformly distributed amplitudes. The signal should be used to measure parameters of AD converters using histogram test method.

Dušan Agrež
DISTORTION ANALYSIS OF ANALOG-TO-DIGITAL CONVERTER BY IDFT AND LEAST-SQUARES FITTING ALGORITHM

This paper compares two basic procedures used in estimations of the significant components in the residual spectrum in the ADC dynamic testing. The properties of the weighted DFT interpolations for the frequency, amplitude, and phase estimations in order to reduce the leakage effect of the fundamental component in the investigation of the residual spectrum is described. The nonparametric interpolation algorithms retain all benefits of DFT approaches and improve the estimation accuracy as a function of a number of the signal cycles in the estimation interval. The comparison of the three-point estimation algorithms to the least-squares four-parameter sine-fit estimation described in the IEEE standard 1241 shows the estimation effectiveness.

Vaclav Papez, Stanislava Papezova
HIGHLY PURE SINE-WAVE SIGNAL SOURCES FOR ADC TESTING

It is necessary to keep at the disposition test signals with a high spectral purity for series measuring e.g. in the area of metrology or electronics. Commercial signal generators do not satisfy higher requirements in this area. Our contribution describes chances of the improvement of their quality while using of suitable filters. There is described the construction of a special generator with a high spectral purity of a signal.

F. Corrêa Alegria, A. Cruz Serra
UNCERTAINTY ANALYSIS OF THE ADC HISTOGRAM TEST USING TRIANGULAR STIMULUS SIGNALS

This paper addresses the uncertainty of the estimates of ADC testing obtained with the Histogram Method when a triangular stimulus is used. Expressions are presented for the computation of the standard deviation of the transition voltages and code bin widths. These can be used for the Ramp Vernier Test which is a novel test method which will be included in the new version of the IEEE 1057 standard currently in balloting.

Domenico Luca Carnì, Domenico Grimaldi
OVERSAMPLING METHOD FOR THE STATIC CHARACTERIZATION OF HIGH RESOLUTION DAC: A PROPOSAL FOR THEIEEE STANDARD P1658

The paper presents an improved implementation of a method pointed out for the static characterization of the new generation of high resolution Digital to Analogue Converters (DACs). Interesting aspect of this method is that the problem of the signal acquisition with high resolution is shifted to the simpler problem of the signal acquisition with high speed. In particular, the method is based on the comparison of the DAC output voltage with the analogue reference sinusoidal voltage and the detection of the Zero Crossing Sequence (ZCS) of the resulting signal by high speed ADC. The variation of the ZCS respect to that occurring in the sinusoidal reference signal is used to evaluate the DAC transfer characteristic. The improved implementation concerns the proper design characteristics that can be used as selecting criteria of the test equipment. In particular, the substitution of the ADC for the detection of the ZCS by the comparator device is investigated without affecting the accurate detection of the zero crossing. Moreover, the effects of the noise parameters affecting the generator feeding the reference analogue signal, as amplitude and phase noise, on the evaluation of the DAC static characteristic is analysed by considering test equipment using the comparator device and the high speed ADC, alternatively.

Stephen Ralph, Ronan Farrell
DIRECT DIGITAL-TO-RF CONVERSION FOR MOBILE-PHONE BASESTATION APPLICATIONS USING BANDPASS SIGMA DELTA MODULATION

Sigma-delta modulator based digital-to-analog converters (DAC) have offered low-frequency designers a highly linear, high resolution data converter architecture that is highly amenable to integration with complex digital systems. Increasingly these data converters have been used to deliver all the power needed. In wireless applications, it is increasingly desirable to apply low-frequency sigma-delta techniques to RF signals and try to achieve similar benefits. In this paper we discuss the unique challenges that DACs in mobile phone basestations must satisfy and we present a flexible bandpass sigmadelta modulator architecture that can satisfy these criteria.

Valeriy I. Didenko, Aleksander V. Ivanov, Aleksey V. Teplovodskiy
NEW APPROACH TO THEORY OF SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS

The main point of new approach to the theory of sigma-delta modulation is application of a discrete two-values distribution law for a quantization noise instead of a uniform distribution law accepted before. Due to the new approach, the variance (standard deviation in the square) of the quantization noise becomes dependent on input signal by parabolic function. The noise vs. frequency is found for different input signals taking into account all frequency range from zero to half of sampling frequency. Using dependence of standard deviation on input signal and frequency, different characteristics of sigma-delta modulation can be predicted, including SNR. Difference between analytical and simulation results for new theory can be driven to any small value.

Roberto Lojacono, Arianna Mencattini, Marcello Salmeri, Silvia Sangiovanni
FULL FLASH LOGARITHMIC ADC ARCHITECTURE

The advantages of a signal processing in the logarithmic domain are recently pointed out by some authors. On the other hand, suitable logarithmic input amplifiers are available in the literature. The traditional logarithmic amplifier configuration based on a voltage operational amplifier with a diode connected transistor in its feedback loop, which displays a significantly reduced bandwidth at lower signal levels, was modified replacing the operational amplifier by a transconductance feedback amplifier. This solution overcomes the said problem completely and offers constant-bandwidth operation throughout the full signal range. Some authors have proposed algorithmic architectures for the hardware realization of logarithmic Analogue to Digital Converters (ADC). This paper presents a fully analogue architecture of logarithmic ADC. The proposed architecture represents a logarithmic version of the calliper rule based linear ADC recently proposed. The main feature of this architecture is the small number of reference resistors needed, namely 3*2n/2 instead of 2n, being n the number of bits of the binary converted sample.

Page 832 of 936 Results 8311 - 8320 of 9356